1. Field of the Invention
The present invention relates to an integrated circuit architecture, that when coupled to a bi-stable circuit, prevents the bi-stable circuit from being effected by incident radiation that causes Single-Event-Upsets (SEU) and/or Single-Event-Gate-Rupture (SEGR).
2. Prior Art
Bi-stable circuits, and particularly CMOS bi-stable flip-flops, latches, and static-random-access-memories (SRAM), that have the ability to self-re-enforce a programmed state (such as Q=1 and Q_bar=0, or BIT=1 and BIT_bar=0) to be referred to later by the system that programmed the present state are well known in the art. A typical application for a bi-stable flip-flop or latch is in combinational logic using previous and present states, such as D type flip flops, SR latches, and JK flip flops. Another typical example for a bi-stable circuit is in a static random access memory cell, which is generally used in sizable arrays that remember programmed data as long as power is applied. However, bi-stable circuits are also used in many different functional blocks and applications, and then usually implemented in integrated circuits. The general purpose of bi-stable circuits is to remain in one of two possible programmed states, however when used in space, radiation that is naturally present in space can become incident on the integrated bi-stable circuit and cause the bi-stable circuit to change to the opposite state or change to a state other than what it was programmed to remain. Incident radiation changing the programmed state of a bi-stable circuit can cause undesirable effects to the system that uses the programmed state of the bi-stable circuit for system operations. An example of this would be static-random-access-memory in a satellite used to provide navigation information or secure military communication, that when the static-random-access-memory is unknowingly flipped to the opposite state by incident radiation, provides incorrect navigation information, or incorrect and communication for military command and control. Therefore it is desirable to provide protection to space-based bi-stable circuits that prevents unknown and undesirable state changes to the bi-stable circuit due to incident radiation. Most existing bi-stable circuits that are hardened, or less susceptible to the effects of incident radiation in space, are manufactured as integrated circuits in special fabrication process that are expensive and not always adequate in providing acceptable levels of protection for the bi-stable circuit in space. The expense of special fabrication processes that manufacture hardened bi-stable circuits drive the cost of hardened circuits very high. Some designs exist that protect bi-stable circuits from unknown and undesirable state changes due to incident radiation and do not need to be manufactured in special fabrication processes and are known as radiation-hardened-by-design (RHBD) circuits. The RHBD bi-stable circuits are large (smallest most effective RHBD SRAM consists of 12 transistors), and are slow due to the size and complexity of design required to make a bi-stable circuit RHBD. Therefore, what is desired is a small, fast, generic integrated circuit architecture that can be coupled to any integrated bi-stable circuit making it immune to unknown and unwanted circuit changes due to incident radiation, that can be manufactured in a typical, non-specialized, in-expensive, integrated circuit manufacturing process.